Semiconductor apparatuses have come to be used in a state where semiconductor chips are stacked in order to increase packaging densities, in many cases. A conventional stacked chip semiconductor package has a stacked structure made by stacking a plurality of units. Each unit includes a semiconductor chip, a circuit board having the semiconductor chip mounted thereon, and a frame-shaped insulating substrate which has a chip cavity and which is mounted on the circuit board. The stacked structure in which the plurality of units is stacked is sandwiched by two insulating substrates, and then the resultant structure is made monolithic, thus forming the semiconductor package. A required number of external connection terminals made of solder balls or the like are formed on an outer surface of one insulating substrate. The external terminals are electrically connected to electrodes of the semiconductor chips, respectively, through electrically conductive vias formed in the insulating substrates.
Adoption of such a stacked semiconductor package realizes a smaller semiconductor apparatus with higher density. However, since a smaller semiconductor apparatus has a structure with such high-density integration of semiconductor chips, heat is more apt to be generated.
A high temperature of a semiconductor chip harmfully affects operations and reliability of the semiconductor device. Particularly in a semiconductor memory such as a dynamic random access read write memory (DRAM), a high temperature causes deterioration in memory retention characteristics. Accordingly, in stacked semiconductor packages, heat radiation measures are required.
Another limitation is the low power dissipation of the package. The heat is transmitted from one die to the other and there is no significant dissipation path other than through the solder ball to the motherboard. Heat sinks are designed to solve this problem. FIG. 1 illustrates a conventional package assembly 1 having a heat sink 8. Flip chip 6 is connected to substrate 2 through bumps 4. A heat sink 8 typically formed of a metal with good heat conductance is attached to the back surface of the flip chip 6. Heat sink 8 has a surface exposed to outside of the package assembly 1. Heat generated by chip 6 is conducted to the heat sink 8 and then dissipated to outside.
When chips are stacked and packaged, heat dissipation is more complicated. Existing applications either has no thermal enhancement implemented, or use wire bond package in order to apply heat-dissipating device. FIG. 2 illustrates a stacked chip package 9. Chips 14 and 22 are wire bonded to a substrate 10. A heat sink 26 is attached to substrate 24. Chip 22 faces down and is wire bonded. Substrate 24 is wire bonded to chip 22 by wires. Wires 28 connect to substrate 10 through substrate 24. A supporting frame 18 supports the chip 22 and substrate 24. It is noted that due to the clearance space needed by wires 16, 28 and supporting frame 18, chip 14 is relatively far away from the heat sink 26. Heat generated by chip 14 has to go through thick layers of module encapsulation 20, then chip 22 and substrate 24 before it reaches heat sink 26. This greatly limits heat dissipation capability to less than about one to two watts per package.
Heat can also be dissipated through substrates. Heat sink may also be attached to substrate that has a flip chip attached. Copper traces can be embedded in the substrate to improve heat conductance. Since substrate has ball grid array balls locating on the same side the heat sink is attached, the space available to heat sink is limited. Also, substrates have limited heat dissipating capability due to material limitations.
As technology advances, packages are more condensed, and frequency goes higher. These all increase heat generated per unit volume of the semiconductor packages. Therefore, there is the need for better heat dissipation scheme.